1. Technical Field
The present invention relates to a semiconductor memory apparatus and, more particularly, to a data output device that controls a slew rate of an output signal in response to impedance variation of an output driver and a semiconductor memory apparatus including the same.
2. Related Art
Generally, a semiconductor memory apparatus includes a data output device that drives and outputs data selected by a read command.
The data output device has a structure in which a pre-driver and a main-driver are connected in series to each other. An impedance of the main-driver is controlled so as to match an impedance of a transmission channel in order to support high-speed operation of the semiconductor memory apparatus.
The data output device applies an output signal of the pre-driver to the main-driver irrespective of an impedance variation of the main-driver. As a result, a slew rate of the output signal is varied depending on the impedance of the main-driver, which generates a jitter. Therefore, signal integrity is deteriorated and a data eye is narrowed.